ASIC Design Verification Engineer (C++)

Waymo is an autonomous driving technology company with a mission to make it safe and easy for people and things to get where they’re going. Since our start as the Google Self-Driving Car Project in 2009, Waymo has been focused on building the World’s Most Experienced Driver in hopes of improving the world's access to mobility while saving thousands of lives now lost to traffic crashes. Our Waymo Driver powers Waymo One, our fully autonomous ride-hailing service, as well as Waymo Via, our trucking and local delivery service. To date, Waymo has driven over 20 million miles autonomously on public roads across 25 U.S. cities and conducted over 20 billion miles of simulation testing.

Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms.

In this role, you'll:

• Work closely with the design team to define specifications and test plans
• Execute on the test plan, including test development, reference model design, and failure debug
• Contribute to the development of  overall verification infrastructure and tools
• Collect and analyze coverage metrics
• Advocate and establish verification best-practices

At the minimum, we'd like you to have:

• 3+ years of experience with digital architecture and logic
• Good software skills, including experience with C/C++ for reference model development
• Advanced verification techniques like constrained random generation, functional coverage, and assertions
• Experience with modern DV methodology such as UVM a big plus
• Knowledge of System Verilog a big plus

It's preferred if you have:

• Experience with the full digital design verification cycle -- from spec through bring-up
• Experience with performance and power validation, digital design (RTL), and formal verification
• Experience with machine learning and other high performance compute elements
• Experience with industry standard protocols, interfaces and IP components, such as PCIe, DDR, Ethernet, and NoCs
• Prototyping and debug of systems on FPGA platforms and emulators

Note: The following is only applicable for roles hired in the US. As we keep the safety of our employees and our communities top of mind, COVID-19 vaccinations continue to be a critical prevention measure to help end the pandemic.  Because of this, Waymo requires all US-based employees who perform work onsite for Waymo to be fully vaccinated against COVID-19.  If you are unable to be vaccinated due to a disability, medical condition or religious belief, Waymo will provide a reasonable accommodation consistent with federal, state, and local law.